STARM · HW-06 · HARDWARE

Radiation-Induced Soft Errors

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STARMCatalog entries from the DIPS Threat Inventory. The paper cites that dataset and does not use this name.

Natural bit-flips used to bypass security checks.

Severity in the dataset7/10

Not the paper’s H/M/L.

Target
Data / Instructions
Layer in the inventory
RAM / Registers
Mitigation
Rad-hard hardware and ECC memory.
How the inventory says to fix it
Rule-based: ECC and Triple Modular Redundancy (TMR). AI: Predictive models to correlate solar activity with error rates.
Quick fix
ECC correction
ML approaches named
Isolation Forest, One-Class SVM, Autoencoders, Variational Autoencoders, Gaussian Mixture Models
Methodology
Anomaly detection + fault classification ot detect Single Event Upsets (SEUs), Bit flips in memory/registers, Single Event Transients (SETs) , glitches in signals Timing anomalies, Unexpected resets , incorrect computations
Handler role
Space Environment Lead
Stage
Design/Orbit
Standard named
ECSS-E-ST-10-04C
Status in the inventory
Avoided

STARMCatalog entries from the DIPS Threat Inventory. The paper cites that dataset and does not use this name.

Connection recorded in the inventory

Memory Corruption